PACKAGING METHOD FOR INTEGRATED CIRCUITS
Application 137/DEL/2005 published 2006-11-10, filed 2005-01-24
A packaging method for integrated circuits comprising processes such as wafer grinding, wafer mount, wafer saw, die attach, etc., multiple singulated chips are each attached and assembled to leadframe unit, the leadframe unit is used as electrical out-connecting component for each chip, and the wire-bonding part of the chip is dispensed continuously with encapsulant material to seal, curing method is further applied to solidify the encapsulant, then saw or punching method is used to dice apart each chip accompanied with leadframe unit (singulation process), a ready-to use integrated circuit is thus obtained, such manufacturing processes let the goals of easy-to manufacture, fast production and lowered production cost be easily achieved for the packaging and singulating processes.
Applicant
1)OPTIMUM CARE INTERNATIONAL TECH. INC
:8F, NO.28, LANE 513,RUEIGUANG RD., NEIHU DISTRICT, TAIPEI CITY 114, TAIWAN, R.O.C. Taiwan
Inventor
1)JEFFREY LIEN
International Info
Classification: H01L21/46