BigPatents India

The present invention provides a phase-shift enable and disable signal generator connected to configuration bits at its first input and connected to a reset signal at its reset input for generating a control signal, said configuration bits corresponding to the phase shift required, a logic signal generation device connected at its control input to the output of said phase-shift enable and disable signal generartor and connected to a reset signal at its reset input for providing a phase generating signal, and a feedback element connected between the output of said logic signal generation device and control input of said phase-shift enable and disable signal generator for providing controlled clock signal to said phase-shift enable and disable signal generator