BigPatents India

A turn-off high power semiconductor device with the inner pnpn-layer structure of a Gate- Commutated Thyristor and a first gate on the cathode side has an additional second gate on the anode side, said second gate contacting the n-doped base layer and having a second gate contact. A second gate lead which is of rotationally symmetrical design and is disposed concentrically with respect to the anode contact is in contact with said second gate contact. Said second gate lead is brought out of the component and electrically insulated from the anode contact. The rotationally symmetrical design of the second gate contact and gate lead leads to a considerable reduction in the loop inductance formed by the geometrical arrangement of the individual components in the second gate-anode circuit allowing fast reduction of charge carriers in the blocking transistor in synchronism with device turn-off via the cathode-side gate. The dual-gate semiconductor device can therefore be driven in a 'hard' mode with very steep and high gate pulses on either one or on both of the gates for both turn-on and turn-off and can achieve operating frequencies up to twice those of a conventionallGCT.